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Speakers

Mr. Hemant Mallapur

Chief Guest

Co-founder & Exec. VP Engineering, Saankhya Labs

Keynote Title : Software Defined Radio – VLSI architecture for Wireless Communication

Bio

India-based deep-tech entrepreneur with 3 decades of R&D in wireless semiconductor technologies with 5 key patents in Software Defined Radio systems. Co-founder & Executive VP of Engineering of Saankhya Labs – India’s 1st Fabless Semiconductor company. Raised investment from Intel, General Motors & Sinclair and expanded into an OEM supplier for 5G, Broadcast, Satcom, Defense equipment with customers in US & India. Saankhya grew into an MSME over 15 years with a headcount of 400. Saankhya has been recently acquired by Tata Group company Tejas Networks. Saankhya’s 5G products were demonstrated to the Honorable PM Shri Narendra Modiji at India Mobile Congress & it is recognized as a leader in India’s Atmanirbhar mission in 5G. Saankhya won many international awards including IMS Research Semiconductor TV Innovation, FT Asia Pacific High Growth companies & CII Industrial Innovation. Hemant was featured in EDN Asia magazine as a Tech Innovator and was part of Sage Inc, a US-based company that had a successful IPO on NASDAQ. He obtained his B.Tech in Electronics and Communications Engineering from College of Engineering, Jawarahlal Technological University, Hyderabad in 1992. He lives in Bangalore with his wife Jasmina and daughter Diya.

Dr. Parthasarathy Ramaswamy

Inauguration Keynote Speaker

Senior Principal Engineer at Intel Corporation

Keynote Title: DDR Memory overview

Bio

Dr.Partha Ramaswamy is a senior principal engineer in the data center group at Intel corporation. His expertise spans across client and data center compute platform electricals. His research interests include advanced materials for high speed interconnect solutions.

Prasanna Thyamagondlu

Keynote Speaker 1

Director- Product Development, Capgemini

Bio

Prasanna is a industry veteran having worked for over 28 years with multiple companies such as Wipro, Infosys, Lattice semiconductors, Intel, Microchip and Capgemini. He completed his engineering in Bangalore University, India. He spent about 15 years of his career in US and has been an US Citizen since 2009. He returned to India from US by 2012 and continued his career. He visits universities as guest lecturer and a board member for the VTU, graduate and post graduate studies in the past. He has travelled across globe and worked with engineering teams in Germany, France, Japan and US.

Prasanna Thyamagondlu primarily worked on various activities involving himself from concept to silicon. These designs were in the area of Microcontrollers, Core-logic chipset, Networking, Automotive, ALS, ARM subsystem and associated bus protocols. He has participated in emulation, prototyping and also on post silicon validation. He has led and mentored teams in both design services and product companies and has successfully taped out several designs. He has also led standard cell library teams and has expertise in the design and validation of these libraries.

Dr. Vaibhav Pratap Singh

Keynote Speaker 2

Principal Technical Officer, CDAC

Keynote Title : DIR-V ecosystem in India

Bio

Mr. Vaibhav Pratap Singh joined C-DAC in 2014 and is currently working as Principal Technical Officer with the IoT team. He is also currently pursuing his Ph.D at IIT Madras. He has done MS (by Research) from IIT Madras and B.Tech in ECE from DIT Dehradun.
His current interest includes Quantum Key Distribution, Machine learning, Electronics for Quantum Computing and Communications. His projects, over the years, have been majorly in the domain of Embedded Systems and Internet of Things.
He has been awarded in past as Bayer Young Environmental Envoy by Bayer India and United Nations Environment Program (UNEP) for designing a Wireless Sensor Network to do soil CO2 monitoring. He has filed3 patents andhas multiple journal and conference publications.

Dr. N. S. Murthy

Tutorial Speaker

Consultant to LeCo Consulting

Tutorial Title: VLSI Fab and Test Demystified

Bio

Dr. N.S. Murthy is currently a consultant to LeCo Consulting. Till Jun 2020, he was the chairman and professor of the department of Electronics and Communication Engineering of Amrita Vishwa Vidyapeetham, Bengaluru. Till May 2012, he was the Director of New Business Initiatives and Academic Relations of NXP Semiconductors, Bangalore. Before this, Dr. Murthy was the Director, Technology Management and Academic Relations and General Manager of the Reuse Technology Group of Philips Semiconductors. Till Nov 2000, Dr. Murthy served IBM as Deputy General Manager of Hardware design Group and prior to that he was with Semiconductor Complex Limited in various roles. Dr. Murthy obtained Ph.D. in Microelectronics from the Department of Electrical Engineering of IIT Bombay, MBA from IGNOU, Delhi and Mastering the Semiconductor Business (mini-MBA) from Ashridge Management College, London. He has 29 years of industrial experience and 8 years of academic experience. He has two granted US/European patents and 50+ Scopus indexed publications/presentations in international journals/conferences. Dr. Murthy’s interests span to VLSI and embedded systems design and fabrication.

Abstract

This tutorial “VLSI fab, assembly and test demystified” will cover the basics of the technologies and processes applied in the fabrication, assembly and test of VLSI circuits. This will enable the participants to get an idea of the multidisciplinary nature of the whole post VLSI design technologies and the complexities involved. The aim is to help the VLSI designers and those involved in semiconductors in general to appreciate the major and the most complex side of the semiconductors business, i.e. the post design tape out phase. Physical samples or mask plates, silocon wafers and devices in different stages or manufacturing process will be shown.

Mr. Sharan A.

Workshop Speaker

Application Engineer

CoreEL Technologies

Workshop Title: System Design Flow using Xilinx Vivado and Vitis on Pynq-Z2 Board

Bio

Mr. Sharan A is the Application Engineer for Xilinx & Mentor products at CoreEL Technologies, Bengaluru. He holds a B.E degree from Sri Krishna College Of Engineering and Technology Coimbatore. He has 2 years of extensive experience in Technical Education. He is currently providing technical engagement and solutions to educational institutions as a part of CoreEl University Program. He has technical hands-on expertise in Xilinx &MentorGraphics. His area of interests are RTL,Embedded-C,ASIC design.

Abstract

This workshop “System Design Flow using Xilinx Vivado and Vitis on Pynq Z2 Board” will cover the digital design implementation using Vivado design suit. This will enable the participants to get an idea of Vivado design flow. In addition, this workshop will cover the Pynq Python framework flow for AI-ML application. This will enable the participants to get an idea of AI-ML application implementation using Pynq board. Further, this workshop will cove the Pynq Python framework flow for image processing. This will enable the participants to get an idea of image processing implementation using Pynq board.

P. Venkat Rangan, PhD
P. Venkat Rangan, PhD

Vice Chancellor, Amrita Vishwa Vidyapeetham

Sasangan Ramanathan, PhD
Sasangan Ramanathan, PhD

Dean Engineering, Amrita Vishwa Vidyapeetham

Dr. Manoj P.
Dr. Manoj P.

Director, Amrita School of Engineering (ASE), Bengaluru

Sriram Devanathan, PhD (Chair)
Sriram Devanathan, PhD (Chair)

Principal, Amrita School of Engineering, Bengaluru

N. S. Murty, PhD
N. S. Murty, PhD

Prof (R’td) Amrita School of Engineering, Bengaluru

T. S. B. Sudarshan, PhD
T. S. B. Sudarshan, PhD

PES University, Bengaluru

Krishnashree Achuthan, PhD
Krishnashree Achuthan, PhD

Dean of PG Programs, Amrita Vishwa Vidyapeetham

Devesh Dwivedi, PhD
Devesh Dwivedi, PhD

Samsung Semiconductor India

Mahadevan S, PhD
Mahadevan S, PhD

Deputy Dean, Amrita Vishwa Vidyapeetham

Bharat Jayaraman, PhD
Bharat Jayaraman, PhD

University of Buffalo

Shikha Tripathi, PhD
Shikha Tripathi, PhD

PES University, India

Nandy S. K., PhD
Nandy S. K., PhD

IISc, India

Chetan Parikh, PhD
Chetan Parikh, PhD

IIIT, Bangalore

M. Vinodhini,  PhD
M. Vinodhini,  PhD

General Chair

Amrita School of Engineering, Bengaluru

T. K. Ramesh, PhD
T. K. Ramesh, PhD

General Co-Chair

Amrita School of Engineering, Bengaluru

Padmanaban K., PhD
Padmanaban K., PhD

General Co-Chair

Intel Corporation, India

Binu John, PhD
Binu John, PhD

General Co-Chair

Harman, India

Sreeja Kochuvila, PhD
Sreeja Kochuvila, PhD

Program Co-Chair

Amrita School of Engineering, Bengaluru

Ravikanth Pasumarthy
Ravikanth Pasumarthy

Program Co-Chair

Capgemini, India

Navin Kumar, PhD
Navin Kumar, PhD

Program Co-Chair

Amrita School of Engineering, Bengaluru

K. V. Nagaraja, PhD
K. V. Nagaraja, PhD

Program Co-Chair

Amrita School of Engineering, Bengaluru

Manoj Kumar Panda, PhD
Manoj Kumar Panda, PhD

TPC Co-Chair

Amrita School of Engineering, Bengaluru

Ayan Dutta
Ayan Dutta

TPC Co-Chair

Ex.  Intel Corporation, India

Kamatchi S., PhD
Kamatchi S., PhD

TPC Co-Chair

Amrita School of Engineering, Bengaluru

Sateesh K
Sateesh K

TPC Co-Chair

Tech Mahindra, India

Mridula K. M.,  PhD
Mridula K. M.,  PhD

TPC Co-Chair

Syrma Technology, India

Abhilash Ravikumar, PhD
Abhilash Ravikumar, PhD

TPC Co-Chair

Amrita School of Engineering, Bengaluru

Shamik Chakraborty
Shamik Chakraborty

TPC Co-Chair

Amrita School of Engineering, Bengaluru

N. Neelima, PhD
N. Neelima, PhD

Finance Chair

Amrita School of Engineering, Bengaluru

K. Deepa, PhD
K. Deepa, PhD

Finance Chair

Amrita School of Engineering, Bengaluru

Charitha Kongala
Charitha Kongala

Finance Chair

Student Chair, IEEE, ASE, Bengaluru

M. Swarnambiga
M. Swarnambiga

Finance Chair

Grad. Student, ASE, Bengaluru

Sonali Agrawal
Sonali Agrawal

Publicity Co-Chairs

Amrita School of Engineering, Bengaluru

Nippun Kumaar A. A.
Nippun Kumaar A. A.

Publicity Co-Chairs

Amrita School of Engineering, Bengaluru

Priya K.
Priya K.

Publicity Co-Chairs

Amrita School of Engineering, Bengaluru

Harika Pudugosula
Harika Pudugosula

Publicity Co-Chairs

Amrita School of Engineering, Bengaluru

Shruthi N. V.
Shruthi N. V.

Graduate Women Victoria, Australia

Amrita School of Engineering, Bengaluru

Aaryan Oberoi
Aaryan Oberoi

Penn State University, USA

Amrita School of Engineering, Bengaluru

Sri Manogna
Sri Manogna

Student Chair, IEEE, ASE, Bengaluru

Amrita School of Engineering, Bengaluru

Noopura Parvathi A.
Noopura Parvathi A.

Grad. Student, ASE, Bengaluru

Amrita School of Engineering, Bengaluru

Akhila V.
Akhila V.

Grad. Student, ASE, Bengaluru

Amrita School of Engineering, Bengaluru

Nandi Vardhan H. R.
Nandi Vardhan H. R.

Industry Liaison Chairs

Amrita School of Engineering, Bengaluru

Shekar Babu, PhD
Shekar Babu, PhD

Industry Liaison Chairs

Amrita School of Engineering, Bengaluru

Dhanesh G. Kurup,  PhD
Dhanesh G. Kurup,  PhD

Industry Liaison Chairs

Amrita School of Engineering, Bengaluru

Shruthi A. S.
Shruthi A. S.

Industry Liaison Chairs

Amrita School of Engineering, Bengaluru

Anjana Ramchandran
Anjana Ramchandran

Industry Liaison Chairs

Amrita School of Engineering, Bengaluru

Vineeth Kumar Talari
Vineeth Kumar Talari

Industry Liaison Chairs

Amrita School of Engineering, Bengaluru

Sathish kumar
Sathish kumar

Webpage Chair

Amrita School of Engineering, Bengaluru

Pooja Kenchetty P., PhD
Pooja Kenchetty P., PhD

Webpage Chair

Amrita School of Engineering, Bengaluru

H. Akansha
H. Akansha

Webpage Chair

IEEE Student, ASE, Bengaluru

Akanksha U. Hiremath
Akanksha U. Hiremath

Webpage Chair

Grad. Student, ASE, Bengaluru

Divya M. G.
Divya M. G.

Publication Co-Chairs

CDAC

Kirti S. Pande
Kirti S. Pande

Publication Co-Chairs

Amrita School of Engineering, Bengaluru

Chintala Ramesh, PhD
Chintala Ramesh, PhD

Publication Co-Chairs

Amrita School of Engineering, Bengaluru

Susmitha Vekkot, PhD
Susmitha Vekkot, PhD

Publication Co-Chairs

Amrita School of Engineering, Bengaluru

Salija P., PhD
Salija P., PhD

Publication Co-Chairs

Amrita School of Engineering, Bengaluru

Paramasivam C., PhD
Paramasivam C., PhD

Tutorial Co-Chairs

Amrita School of Engineering, Bengaluru

Uma Maheshwari, PhD
Uma Maheshwari, PhD

Tutorial Co-Chairs

Amrita School of Engineering, Bengaluru

K. N. Apoorva
K. N. Apoorva

Tutorial Co-Chairs

Grad. Student, ASE, Bengaluru

Shrikant S. Tangade
Shrikant S. Tangade

Tutorial Co-Chairs

Christ University, Bengaluru

Parul Mathur, PhD
Parul Mathur, PhD

Tutorial Co-Chairs

Amrita School of Engineering, Bengaluru

Swaminadhan R.
Swaminadhan R.

Tutorial Co-Chairs

Amrita School of Engineering, Bengaluru

Ganapathi Hegde, PhD
Ganapathi Hegde, PhD

Local Chair

Amrita School of Engineering, Bengaluru

Vignesh V.
Vignesh V.

Local Chair

Amrita School of Engineering, Bengaluru

Sreebha Bhaskaran
Sreebha Bhaskaran

Local Chair

Amrita School of Engineering, Bengaluru

Akshay Bhardwaj
Akshay Bhardwaj

Local Chair

Grad. Student, ASE, Bengaluru

Devunuri Vasu
Devunuri Vasu

Intel, India

Biswajit Mishra, PhD
Biswajit Mishra, PhD

DAIICT, Gandhinagar

Adit Singh
Adit Singh

Auburn University

K. S. Dasgupta, PhD
K. S. Dasgupta, PhD

DAIICT, Gandhinagar

Niranjan Devashrayee, PhD
Niranjan Devashrayee, PhD

Nirma University, Ahmedabad

Omprakash, PhD
Omprakash, PhD

DRDO, Hydrabad

Virendra Singh, PhD
Virendra Singh, PhD

IIT, Bombay

Kunnathu Sajith
Kunnathu Sajith

Intel, India

Chetan Rao
Chetan Rao

Tredence Inc., USA

Aditya Muralidharan
Aditya Muralidharan

Qualcomm, USA

Ramya Koshy
Ramya Koshy

Academic and Business Development, UAE

Nirmala Devi M., PhD
Nirmala Devi M., PhD

Amrita Vishwa Vidyapeetham, India

Bala Tripura Sundari B., PhD
Bala Tripura Sundari B., PhD

Amrita Vishwa Vidyapeetham, India

S. Moorthi, PhD
S. Moorthi, PhD

NIT, Tiruchirapalli, India

Malathi D., PhD
Malathi D., PhD

Kongu Engineering College, India

Krishnamoorthy P, PhD
Krishnamoorthy P, PhD

Philips, India

Subhajit Sen, PhD
Subhajit Sen, PhD

IIITB, Bangalore

Usha Mehta, PhD
Usha Mehta, PhD

Nirma University, Ahmedabad

P. Sivaranjani, PhD
P. Sivaranjani, PhD

Kongu Engineering College, India

Sabarimalai Manikandan, PhD
Sabarimalai Manikandan, PhD

IIT Bhuvaneshwar, India

N. B. Balamurugan, PhD
N. B. Balamurugan, PhD

Thiagarajar College of Engineering, India

Gunvathi K., PhD
Gunvathi K., PhD

PSG College of Technology, India

Laxshmi Narayan G, PhD
Laxshmi Narayan G, PhD

NIT, Tiruchirapalli, India

Padmesh
Padmesh

Atlas, india

Kalpana M., PhD
Kalpana M., PhD

PSG College of Technology, India

Anu karpaga
Anu karpaga

Qualcomm, India

Puneeth L.
Puneeth L.

AMD, India

Shivaramakrishnan Sankaran
Shivaramakrishnan Sankaran

Synopsys, India

Kotha Srinivas Reddy PhD
Kotha Srinivas Reddy PhD

Titagarh wagons Ltd, Kolkata

Nupur Jain PhD
Nupur Jain PhD

TCS Research, Mumbai

Lintu Rajan, PhD
Lintu Rajan, PhD

NIT, Calicut, India

Sudhi Sudharman, PhD
Sudhi Sudharman, PhD

Christ University, India

Dhanya Menon
Dhanya Menon

Tessolve, India

Vipin
Vipin

Wipro, India

Nithya Devaraj
Nithya Devaraj

Arrow Electronics, Netherlands

Vijay G.
Vijay G.

 Capgemini, India

Vimala G., PhD
Vimala G., PhD

Dayananda Sagar College of Engineering, India

C. Gunavathi
C. Gunavathi

VIT, India

Reema Sharma, PhD
Reema Sharma, PhD

NHCE, Bangalore

Reema Sharma, PhD
Reema Sharma, PhD

NHCE, Bangalore

Pandikumar Jayapandi
Pandikumar Jayapandi

Qualcomm Global Trading Pvt. Ltd., Singapore

P. R. Sudhakar
P. R. Sudhakar

Tessolve, India

Duragappa A
Duragappa A

Hitachi Rail STS, India

Call for Papers

Systems

  • Reliable and/or Safe Embedded Electronics
  • Systems for Testing
  • Digital System Design and Validation
  • Digital System and Circuits
  • Memory Subsystems
  • Memory Computing Systems
  • HW/SW Co-Design
  • IoT Systems
  • Cyber-Physical Systems
  • Embedded Operating Systems
  • Analog and Mixed-Signal Systems
  • RF Circuits and Systems
  • Low Power Systems
  • Power Management Systems
  • Data converters
  • High-speed Interfaces
  • Reliable Systems
  • Wireless Circuits and Systems
  • CAD Tools and Methodologies for Design and Optimization

Architecture

  • On-Chip Interconnect
  • Inter-Chip Interconnect
  • Multicore and Manycore
  • Data-Centric Architecture
  • System on Chip
  • Embedded Processor Architecture in Vehicle
  • High-performance computing
  • Embedded FPGA
  • Reconfigurable computing
  • Built In Self Test (BIST)
  • Design for Test
  • Fault tolerance
  • Quantum Computing
  • Network Security
  • Side-channel and Fault Analysis
  • Trusted Computing
  • Hardware Trojan
  • Functional Safety and Privacy
  • Optical Interconnect Architecture
  • Reliable Communication Architecture
  • NoC for FPGA, ASIC, CMP and MPSoC
  • Approximate Computing

Technology

  • 3D ICs
  • MEMS, GaN, and SiC devices
  • Layout Technology
  • Physical Design
  • Interconnect Technologies
  • 3D Packaging and Wafer-level Packaging
  • New Age Nanoelectronics Device
  • Electronic Design Automation
  • Advanced CMOS Technology
  • Advanced Packaging and Heterogeneous Integration Technology
  • Process Technology

Applications

  • IoT and Big Data analytics
  • AI oriented Applications
  • Video and Image Processing Applications
  • Hardware Security and Trust
  • ML oriented Applications
  • Wireless/Wired Communication Networks
  • Automotive and Vehicular Networks
  • RF Energy Harvesting
  • Power Electronics Applications
  • Biomedical and Healthcare Applications
  • Sensors and Instrumentation Applications
  • Signal Integrity Applications
Call for Workshops

Following is the information needed while submitting the Workshop proposal:

  1. Name of the Speaker
  2. Designation and affiliation
  3. Brief Bio
  4. Title of the Workshop
  5. Abstract of the Workshop
  6. Duration of the Workshop
  7. Target Audience

Please submit your workshop proposal in a single file to the email ID

c_paramasivam@blr.amrita.edu and r_swaminadhan@blr.amrita.edu

For further details, please contact:

Call for Tutorial

Following is the information needed while submitting the proposal:

  1. Name of the Speaker
  2. Designation and affiliation
  3. Brief Bio
  4. Title of the Workshop
  5. Abstract of the Workshop
  6. Duration of the Workshop
  7. Target Audience

Please submit your workshop proposal in a single file to p_mathur@blr.amrita.edu

For further queries, contact:

Dr. Parul Mathur,
RF & Wireless System Laboratory,
Department of Electronics and Communication Engineering, Amrita School of Engineering,
Amrita Vishwa Vidyapeetham, Bangalore-35

Call for Sponsorships and Exhibits

Platinum Sponsor

Rs. 3,00,000
Available slots – 1

  • Promoted as Platinum sponsor with logo on website, social media, brochures, soft proceedings, banners, venues.
  • Promoted in the registration kit and contents logo, acknowledgment in all sessions. 12 page promotion in brochure and book of abstract
  • Exhibition Space and Tutorial/ workshop slot of 2-3 hours, Track Chairs-Keynote
  • 1/2( Half)-page promotion in brochure and book of abstract
  • Four complementary Registration

Gold Sponsor

Rs. 1,50,000
Available slots – 2

  • Promoted as Gold sponsor with logo on website, social media, brochures, banners, venues, soft proceedings.
  • Promoted in the registration kit, abstract and contents logo, acknowledgment in all sessions, page promotion in brochure and book of abstract.
  • Exhibition Space
  • 2 Complementary Registration

Silver Sponsor

Rs. 50,000
Available slots – 4

  • Promoted as sponsor with logo on website, social media, brochures, banners, venues, soft proceedings
  • Promoted in the registration kit
  • Exhibition Space
  • 1 Complementary Registration
Submission

Original research papers should be submitted in .pdf format as per the conference paper template (given below), not exceeding six A4 size pages and paper should be uploaded through online portal.

There will be double blind review of the paper. Therefore do not include authors’ name in submitted paper. A Paper with authors’ names will not be considered for review. The paper must include an abstract of about 150 words and a maximum of five keywords. Authors of the accepted papers will be informed by email. Information about necessary revisions will be communicated to the corresponding author through email. The author(s) will have to incorporate the suggestions and will have to send the revised camera ready copy of the paper in the given time limit.

Please find the Template and author guidelines.

Use US Letter size in the case of MS Doc.

Overleaf

When working in Overleaf, the template is available at: https://www.overleaf.com/gallery/tagged/ieee-official

Along with the paper, authors are required to submit an undertaking form stating that, the paper has not been published previously, is not under consideration for publication elsewhere, and if accepted will not be published elsewhere in the same form. It is mandatory for at least one of the authors to register in non-student category for publication of the paper in proceedings. For the author presenting more than one paper, it is mandatory to register and present each paper separately.

Instructions for the Submission
Instructions for the submission of the Camera-Ready Paper

1. Complete the registration fee payment and fill out the registration form (Follow the instructions given below).

2. Camera-ready manuscript should be prepared by paying attention to the comments of the reviewers.

3. Before creating IEEE PDF eXpress
Add the copyright notice to the LEFT bottom of the first page of your source document:

Choose from the following options:

    1. For papers in which all authors are employed by the US government, the copyright notice is: U.S. Government work not protected by U.S. copyright
    2. For papers in which all authors are employed by a Crown government (UK, Canada, and Australia), the copyright notice is: 978-1-6654-7095-7/22/$31.00 ©2022 Crown
    3. For papers in which all authors are employed by the European Union, the copyright notice is: 978-1-6654-7095-7/22/$31.00 ©2022 European Union
    4. For all other papers the copyright notice is: 978-1-6654-7095-7/ 22/ $31.00 ©2022 IEEE
      If necessary, contact N. Neelima at n_neelima@blr.amrita.edu for the appropriate copyright notice.
  • Proofread your source document thoroughly to confirm that it will require no revision.

4. Generate the IEEE PDF eXpress using the camera-ready manuscript (Follow the instructions given below).

5. Upload the following files in the link “Create Camera Ready Submission” present in the author console of the CMT Microsoft Portal.

  • Revised manuscript (highlighting the changes made as per the reviewer’s comments).
  • Final camera-ready manuscript.
  • Downloaded PDF file from the IEEE PDF eXpress.

6. Use the link “Submit IEEE Copyright Form” present in the author console of the CMT Microsoft Portal to submit the IEEE copyright form. Read and follow the instructions given in the link to fill out the IEEE copyright form.

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3. Create IEEE PDF eXpress account on the site: ieee-pdf-express.org

  • First-time users should do the following:
    a. Select the New Users
    b. Enter the following:

    1. 54927X for the Conference ID
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    VLSI SATA 2022 Conference Record ID: 54927X.

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Registration
Category Authors Attendees/Listener
Indian Foreigners Indian Foreigners
Early Bird IEEE Member Student 5300 150$ 1200 50$
Professional 5300 150$ 2000 75$
Non-IEEE Member Student 6000 200$ 1500 100$
Professional 7200 200$ 2500 100$
Regular IEEE Member Student 6600 200$ 2200 75$
Professional 6600 200$ 3000 100$
Non-IEEE Member Student 7000 300$ 3000 150$
Professional 8800 300$ 4000 150$
Additional Paper Rate 50% of author registration fee based on the category/paper
Please Note :
One full author registration is necessary irrespective of category
Tutorials and Workshop are planned which will be offered free to registered authors
One full author registration fee includes participation in the conference, publication fees, lunch & refreshments, certificates, one conference kit and banquet dinner.
Only one day registration fee for Tutorials/Workshop 1200
Please Note:
One day Tutorials/Workshop registration fee includes lunch, refreshments and certificate.
Instructions for the Payment of the Registration Fee

1. Registration fee payment method:
The bank account detail is given below for the payment of the registration fee (NEFT/RTGS/IMPS):

Account Name: IEEE COMSOC STUDENT BRANCH CHAPTER
Bank Name: Dhanlaxmi Bank
Account Number: 025800100119377
Bank IFSC Code: DLXB0000258
Branch Name: Kasavanahalli Branch

Please make sure that the corresponding paper ID appears in the description of the transaction number or reference number.
2. Click the below-given link to fill out the Registration form for VLSI SATA 2022:

Register Here

Corresponding authors are strictly advised to upload a copy of the receipt/bill or payment proof with the banking payment reference number while filling out the registration form.

Accommodations and Travels
S. No. Name of the Guest House Address Distance from Host Organization Tariff (Approx.) (24 hrs. checkout)
AC Non-AC
Inside Campus
1. Amrita School of Engineering, Bengaluru Hostel Accommodation   Amrita School of Engineering, No. 26 and 27, Kasavanahalli, Carmelram P.O. Bengaluru-560 035 0 KM Rs. 1500/- + GST (Excluding food) Rs. 250/- + GST (Common rest rooms & Excluding food)
Outside Campus (Available Options)
S. No. Name of the Hotel Address Distance from Campus
1 Octave Hotel & Spa Sarjapur Rd 14, Kailkondanahalli Village, Next to Total Mall, Sarjapur Road, Electronic City 2.9 KM
2 DoubleTree Suites by Hilton Iblur Gate, ORR, Sarjapur Junction, Bangalore, Karnataka- 560102 4.6 KM
3 OYO 8739 Melody Inn Bellandur, Bellandur, Bengaluru, Karnataka 560103 5.2 KM
4 Keys Select Hotel Hosur Road Hosur Road, Opposite Live 100 Hospital, Near Electronic City, Hosur Main Road 5.8 KM
5 Ibis Bengaluru Hosur Road – An AccorHotels Brand 26/1 Near Central Silk Board Junction next to Oxford College Bommanahali, Hosur Road 6. 5 KM
6. OYO 14972 Hotel Ekaa 52, Kudlu Gate, Hosur Main Road, Behind Kudlu Gate Bus Stand, Hosur, Bangalore 7.2 KM
Paper Submission Deadline November 7, 2022 (Pahse 2)
Notification of Acceptance November 18, 2022 (Phase 2)
Camera Ready Submission Deadline November 28, 2022 (Phase 2)
Notification of Acceptance October 16, 2022 (Phase 1)
Early-bird Registration Deadline October 24, 2022 (Phase 1)
Regular Registration Deadline October 31, 2022 (Phase 1)
Camera Ready Submission Deadline October 31, 2022 (Phase 1)

Contact Us

Please feel free to contact us:

vlsisata.amrita@gmail.com

Department of Electronics and Communication Engineering,
School of Engineering, Amrita Vishwa Vidyapeetham,
Bengaluru
Admissions Apply Now