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Publications
Time of flight measurement system for an ultrasonic anemometer

Authors : Chandran, Pooja, Kumar P. Pradeep, Bhakthavatchalu Ramesh

Publisher : Elsevier

Publications
Design of efficient programmable test-per-scan logic BIST modules

Authors : Devika K.N., Bhakthavatchalu, Ramesh

Publisher : Elsevier

Publications
UVM based testbench architecture for logic sub-system verification

Authors : Pavithran T.M, Bhakthavatchalu Ramesh

Publisher : Elsevier

Publications
Hamming 3 algorithm for improving the reliability of SRAM based FPGAs

Authors : Sooraj S, Bhakthavatchalu, Ramesh

Publisher : Elsevier

Publications
Design of interactive paging and locating device for GPS applications

Authors : Muraleedharan, Anjana, Bhakthavatchalu, Ramesh

Publisher : Elsevier

Publications
Design of reconfigurable LFSR for VLSI IC testing in ASIC and FPGA

Authors : Devika K.N., Bhakthavatchalu Ramesh

Publisher : Elsevier

Publications
Low latency max log map based turbo decoder

Authors : Narayanan, Aswathy, Murugan, Senthil, Bhakthavatchalu, Ramesh

Publisher : Elsevier

Publications
Fault tolerant FSM on FPGA using SEC-DED code algorithm

Authors : Sooraj S, Manasy M., Bhakthavatchalu, Ramesh

Publisher : Elsevier

Publications
FPGA based delay PUF implementation for security applications

Authors : Kumar, Mahin Anil, Bhakthavatchalu, Ramesh

Publisher : Elsevier

Publications
Parameterizable FPGA implementation of SHA-256 using blockchain concept

Authors : Devika K.N, Bhakthavatchalu, Ramesh

Publisher : Elsevier

Publications
Comparative Study of Test Pattern Generation Systems to Reduce Test Application Time

Authors : Dilip, Patare Snehal, Somanathan, Geethu Remadevi, Bhakthavatchalu, Ramesh

Publisher : Elsevier

Publications
Block Level SoC Verification Using Systemverilog

Authors : Yadu, Krishnan K, Bhakthavatchalu, Ramesh

Publisher : Elsevier

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