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Publications
Towards Reduction of Software Maintenance Cost through Assignment of Critical Functionality Scores

Authors : Swaminathan J., L. S. Nair;

Publisher : 2020 5th International Conference on Communication and Electronics Systems (ICCES)

Publications
Synthesis, Analysis and Visualization of Networked Executions

Authors : Swaminathan J., K. Karippara;, N. Vasudevan;, V. Illikkal; , A. D. Nayar;

Publisher : 2020 5th International Conference on Communication and Electronics Systems (ICCES)

Publications
Gesture Based Interaction in Immersive Virtual Reality

Authors : Divya Udayan J.

Publisher : Engineering and Scientific International Journal(ESIJ)

Publications
SPICE modeling for Metal Island Charged Confined Cellular Automata

Authors : Dr. Pritam Bhattacharjee; , Kunal Das

Publisher : Journal of Computational and Theoretical Nanoscience (Scopus)

Publications
Methodology of Standard Cell Library Design in .LIB Format

Authors : Arindam Sadhu; , Dr. Pritam Bhattacharjee

Publisher : Journal of VLSI Design Tool & Technology,

Publications
A Hybrid Algorithm for Optimized Resource Allocation under Constrained Task Schedule

Authors : M. Pugalia;, Swaminathan J., A. Ashok;

Publisher : 2020 Fourth International Conference on Computing Methodologies and Communication (ICCMC), IEEE,

Publications
Implementation of ternary logic in QCA using SPICE macro-modeling

Authors : Dr. Pritam Bhattacharjee;, Arijit Dey; , Rajat Subhra Goswami, Swarnendu Kumar Chakraborty; , Kunal Das;

Publisher : Journal of Engineering Technology (SCIE/Scopus), American Society for Engineering Education,

Publications
A 23.52µW / 0.7V Multi-stage Flip-flop Architecture Steered by a LECTOR-based Gated Clock

Authors : Dr. Pritam Bhattacharjee;, Bipasha Nath, Alak Majumder

Publisher : IEIE Transactions on Smart Processing and Computing (Scopus)

Publications
VLSI Transistor and Interconnect Scaling Overview

Authors : Dr. Pritam Bhattacharjee;, Arindam Sadhu

Publisher : Journal of Electronic Design Technology

Publications
Performance Estimation of VLSI Design

Authors : Arindam Sadhu; , Arindam Sadhu; , Sabnam Koley, Sabnam Koley, Dr. Pritam Bhattacharjee; , Dr. Pritam Bhattacharjee;

Publisher : Journal of VLSI Design Tools and Technology

Publications
Voltage Keeper Based Robust Flip Flop For Low Power Applications, Indian Patent File Application No. (Kolkata, India): 201731044358

Authors : Dr. Pritam Bhattacharjee; , Bipasha Nath, Alak Majumder

Publisher : Kolkata, India (2017)

Publications
A Variation-Aware Robust Gated Flip-Flop for Power-Constrained FSM Application

Authors : Dr. Pritam Bhattacharjee, Alak Majumder

Publisher : Journal of Circuits, Systems and Computers (SCIE/Scopus)

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