Publication

Abstract : pThe proposed paper presents a compact set of test sequence that can be given to a group of logic blocks which are present in the circuit under test (CUT). The different blocks inside a CUT may have different number of primary inputs and the length of the test sequences also varies depending on the design. The compaction of test sequence is performed in such a way that a common set of test sequence can be provided to every blocks inside a design. First the test sequences are expanded based on four expansion techniques. The test sequence is then concatenated and compacted. Test compaction is obtained in the proposed method in which the unnecessary test patterns are removed. The method efficiently reduces the storage required for the test sequence. The generated compact functional test sequences are of reduced size and it only require less amount of storage requirements. The proposed method is applied on ISCAS'89, ISCAS'85 and ITC'99 benchmark circuits and compared in terms of the number of bytes needed for storage of the test sequences. © 2018 Academic Press. All rights reserved./p