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Publication Type : Conference Proceedings
Publisher : 2017 International Conference on Computation of Power, Energy Information and Communication (ICCPEIC)
Source : 2017 International Conference on Computation of Power, Energy Information and Communication (ICCPEIC), Tamilnadu, India (2017)
Url : https://ieeexplore.ieee.org/document/8290400
Campus : Coimbatore
School : School of Engineering
Center : Electronics Communication and Instrumentation Forum (ECIF)
Department : Electrical and Electronics
Verified : Yes
Year : 2017
Abstract : Microprocessors provide count leading zeroes (CLZ) circuit to count the number of leading zeroes of a binary number and there are available instructions to support the same. Many research works target on improving the efficiency of CLZ circuitry, yet CLZ is an underutilized function. This paper focuses on exploring the optimization potential of CLZ. In this work, few potential computations and algorithms viz., square root computation and Huffman decoding are implemented with the support of CLZ and the results obtained are verified and compared with the actual codes (without the use of CLZ) in terms of accuracy, efficiency and computation time of the code. Extensive simulations are carried out in IAR Embedded Workbench and Microsoft Visual Studio. The obtained results for square root computation proves that the use of CLZ as an optimization tool outperforms the conventional method by 46.6115 %. Also, an efficient and less complex decoding algorithm using CLZ for variable length prefix code viz., Huffman code is proposed in this paper. © 2017 IEEE.
Cite this Research Publication : R. S. Janani, Dr. Anju Pillai S., and Manjunath, P. K., “Power of CLZ instruction in Numerical Computations”, 2017 International Conference on Computation of Power, Energy Information and Communication (ICCPEIC), Tamilnadu, India. 2017.