Publisher : Electronics Letters
Campus : Amritapuri
School : School of Engineering
Department : Electronics and Communication
Year : 2013
Abstract : A high-speed, large dynamic range fS/4 bandpass ΔΣ-modulator using a first-order error-feedback loop is proposed. The internal quantiser is realised using a high-speed pipelined ADC. Error feedback is achieved by exploiting the implicit latency in a pipelined ADC. The proposed architecture achieves an SNR of 94 dB with an OSR of 32. © The Institution of Engineering and Technology 2013.