Publication Type : Journal Article
Publisher : International Journal of Advanced Research in Electronics and Communication Engineering
Source : International Journal of Advanced Research in Electronics and Communication Engineering, Vol. 4, Issue 12, December 2015.
Campus : Coimbatore
School : School of Engineering
Department : Computer Science and Engineering
Year : 2015
Abstract : Systolic systems provide remarkable scope for scalable architecture and regular data flow in an array of cells. An algorithm or design such as FIR filter requires iterative computations and hence is suitable for systolic implementation through systolic mapping. For mapping, the search space has to be searched for the optimal space-time mapping (allocation of resources). Many algorithms have been implemented for this purpose. This paper gives a brief idea of convergence and resource allocation for a 4-tap FIR filter through genetic algorithm in systolic architecture.
Cite this Research Publication : Bagavathi C, “Performance Evaluation of Genetic Algorithm on Scheduling Systolic Processors”, International Journal of Advanced Research in Electronics and Communication Engineering, Vol. 4, Issue 12, December 2015.