Publication Type : Patents
Source : U.S. Patent US 11/099,3392007.
Url : http://www.google.com/patents/US7307002
Campus : Amritapuri
School : Centre for Cybersecurity Systems and Networks, School of Engineering
Center : Cyber Security, TBI
Department : cyber Security
Year : 2007
Abstract : pA method is disclosed for the definition of the poly-1 layer in a semiconductor wafer. A non-critical mask is used to recess field oxides in the periphery prior to poly-1 deposition by an amount equal to the final poly-1 thickness. A complimentary non-critical mask is used to permit CMP of the core to expose the tops of core oxide mesas from the shallow isolation trenches./p
Cite this Research Publication : Dr. Krishnashree Achuthan, Foster, C. M., Kim, U., Kinoshita, H., Raeder, C. H., Sachar, H. Kaur, Sahota, K. Singh, and Sun, Y., “Non-critical complementary masking method for poly-1 definition in flash memory device fabrication”, U.S. Patent US 11/099,3392007.
