Publication

Abstract : The need for placing more number of transistors in the core area by shrinking of electronic devices has brought out the necessity of scaling down the Field Effect Transistor (FET) devices. According to the current equation of existing MOSFET device the parameters which can increase the device current is probably channel width and the mobility of electrons and holes. The parameter which can help in improving the device performance will be the mobility of electrons and holes. Hence the necessity of replacing the channel material has become a leading research work in nano electronics. The allotrope of carbon atom - Graphene has the most required mobility range which can help in scaling down the currently available MOSFET devices. Some of the parameters which can be improved due to the replacement of channel material is the device drain current, reduction in the amount of impurity added to obtain the required drain current. A scaled down 15nm Dual Gate Graphene Field Effect Transistor is modeled in this work. As the device is scaled down to a such a narrow range the necessity of investigating the device parameters in a nano scale has been carried out using a novel approach of segmenting the channel. An additional focus in this paper is to employ a computationally efficient method for including the Quantum Capacitance effect. The most common methodology for obtaining the values for quantum capacitance is through solving the equations simultaneously as proposed in [1],[2]. The parameters of interest like quantum capacitance and channel potential are assumed initially and the equations are solved until the assumed parameter value and the obtained value are equal. This not only increases the simulation time but also ends up in approximate result values which are complex. The complex solutions cannot be separated into a real and imaginary value in verilog-a as well as in verilog-ams language as given in [3],[4], to enable circuit compatibility. Moreover the approximate resul...