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Intermediate representation for heterogeneous multi-core: A survey

Publication Type : Conference Proceedings

Publisher : 2015 International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI-SATA)

Source : 2015 International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI-SATA), IEEE, Amrita School of Engineering, Bengaluru. (2015)

Url : http://ieeexplore.ieee.org/document/7050496/

Keywords : Benchmark testing, compiler, data structure, Data structures, Digital video broadcasting, heterogeneous multi-core, heterogeneous multicore intermediate representation, intermediate representation, Kernel, Multicore processing, Multiprocessing systems, Optimization, Parallel processing, Parallel programming, Plasmas, program parallelism, Program processors

Campus : Bengaluru

School : Department of Computer Science and Engineering, School of Engineering

Department : Computer Science

Year : 2015

Abstract : One of the necessary conditions to gain performance improvement through heterogeneous multi-core is to exploit the parallelism in the program. Compiler applies various transformations to the code to achieve execution efficiency. Code optimization is one of the important tasks performed by the compiler before generating the target code. With the availability of various parallel programming models in literature, Intermediate representation (IR) is the key point of applying several optimizations. IR is a form of program which is independent of the source language and the target architecture. There are several IR techniques specifically designed for each compiler framework depending on the input programming language. This article studies the most popular IR techniques for heterogeneous multi-core, classifies them into three broad categories and performs a comparison among them based on the data structure used and their importance in academia and research.

Cite this Research Publication : Meena Belwal and TSB, S., “Intermediate representation for heterogeneous multi-core: A survey”, in 2015 International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI-SATA), Amrita School of Engineering, Bengaluru., 2015.

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