Publication Type : Journal Article
Publisher : Communications in Computer and Information Science
Source : Communications in Computer and Information Science, Springer Verlag, Volume 746, p.379-386 (2017)
ISBN : 9789811068973
Keywords : Consistency analysis, Detection and diagnosis, Electric network analysis, Gate levels, Hardware, hardware security, Hardware Trojan detection, Integrated circuits, Intrinsic process, malware, Semiconductor device manufacture, Semiconductor device testing, Semiconductor industry, Test Pattern, Transition probabilities
Campus : Coimbatore
School : School of Engineering
Department : Electronics and Communication
Year : 2017
Abstract : Hardware Trojans (HTs) have become a major threat to the modern fabless semiconductor industry. This has raised serious concerns over integrated circuits (IC) outsourcing. HT detection and diagnosis is challenging due to the diversity of HTs, large number of gates in modern ICs, intrinsic process variation (PV) in IC design and the high cost of testing. An efficient HT detection and diagnosis scheme based on selective segmentation is proposed in this work. It divides the large circuit into small sub-circuits and applies consistency analysis of gate-level properties. In addition, Transition probability (TP) estimation for each node is employed and performed segmentation on the least probable transition nodes. In order to further enhance the detection, optimized test vectors are chosen during the procedure. Based on the selected segments, HTs are detected correctly by tracing gate level properties. © 2017, Springer Nature Singapore Pte Ltd.
Cite this Research Publication : A. K. Sashank, Reddy, H. S., Pavithran, P., Akash, M. S., and M. Devi, N., “Hardware Trojan Detection Using Effective Test Patterns and Selective Segmentation”, Communications in Computer and Information Science, vol. 746, pp. 379-386, 2017.