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Hardware Implementation of Asymmetrical Cascaded H-Bridge 41 level inverter using PIC Microcontroller

Publication Type : Journal Article

Source : 2018, IEEE International Conference on Smart systems and Inventive Technology, Francis Xavier Engineering College, Tirunelveli.

Url : https://ieeexplore.ieee.org/document/8748839

Campus : Coimbatore

School : School of Engineering

Department : Electrical and Electronics

Verified : No

Year : 2018

Abstract : In this paper, an asymmetrical cascaded h-bridge 41 level inverter powered by a single Photo Voltaic (PV) unit using PIC Microcontroller is proposed. The PV unit drives an Interleaved Soft Switched Boost converter (ISSBC) that drives a simple three level inverter and this inverter unit drives a multiple secondary winding transformer. The AC output of the four isolated secondary windings of the transformer are rectified and filtered to deliver four isolated DC voltages in the ratio 1: 3: 9:27. The system incorporates Maximum Power Point Tracking (MPPT) at the front end boost DC-DC converter level. Overall reduced THD is achieved by strategically spacing on the time axis, for each AC cycle, the discrete voltage levels of the 41 level inverter. The results of experimental verifications are provided.

Cite this Research Publication : S.Selvaperumal, M.S.Sivagama Sundari & K.Siva Subramanian, “Hardware Implementation of Asymmetrical Cascaded H-Bridge 41 level inverter using PIC Microcontroller” 2018, IEEE International Conference on Smart systems and Inventive Technology, Francis Xavier Engineering College, Tirunelveli.

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