Publication

Abstract : In this paper an analysis on the advantages and disadvantages of the common algorithms adopted for designing square root calculators on FPGA chips is performed. A comparison of methodology for square root calculation using the CORDIC with Non-Restoring Square root algorithm is presented. This comparison is used to make the computation of complex square roots more efficient as square root calculation is an integral part of the same. The architecture is designed using Verilog HDL language and implemented using Modelsim for simulation and the synthesis is realized using Zed board on Xilinx Vivado. Experimental results demonstrate better performance in terms of power for the case of hyperbolic CORDIC when compared with the non - restoring method.