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Design of Quadrature Voltage Controlled Oscillator at 60GHz in 65nm CMOS

Publication Type : Conference Proceedings

Publisher : 2018 International Conference on Advances in Computing, Communications and Informatics

Source : 2018 International Conference on Advances in Computing, Communications and Informatics (ICACCI), IEEE, Bangalore, India (2018)

Url : https://ieeexplore.ieee.org/document/8554385

Campus : Bengaluru

School : School of Engineering

Department : Electronics and Communication

Year : 2018

Abstract : In this paper, we present an analog design of tunable quadrature voltage-controlled oscillator (QVCO). The QVCO uses a cross coupled CMOS core with differential inductor with a capacitor bank to tune it around 60GHz range for 5G wireless technology solutions. It incorporates an in-phase injection circuit for coupling between the two oscillators. The proposed circuit is designed and simulated in UMC 65nm technology. Simulation results showed a tuning range of 55.5 to 62.9GHz and a worst-case phase noise of -99.26 to -97.29 dBc/Hz at 1MHz offset. The resulting figure-of-merit (FOM) comes to be -190.34 to -189.46 dBc/Hz at 1MHz offset and the corresponding FOM for tuning (FOMT) is -192.28 to -191.4 dBc/Hz at 1MHz offset.

Cite this Research Publication : S. Raman, V. Vignesh, and Dr. Navin Kumar, “Design of Quadrature Voltage Controlled Oscillator at 60GHz in 65nm CMOS”, 2018 International Conference on Advances in Computing, Communications and Informatics (ICACCI). IEEE, Bangalore, India, 2018.

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