Publication

Abstract : In this correspondence, a mathematical model is developed for the efficient realisation of a generalised M × M polyphase parallel finite impulse response (FIR) filter structure composed of M parallel conventional decimator polyphase filters. Primarily, the proposed structure is designed in such a way that the benefit of coefficient symmetry property of linear-phase FIR filters can be availed without using the pre/post circuit blocks. A numerical example is also studied to validate the proposed structure. Furthermore, the delay-elements reduction approach is given to avoid the excessive usage of memory elements and the performance of the proposed structure is evaluated in terms of the number of delay elements (D) , adders (A) and multipliers (M). Compared to the traditional structures, our proposed structure is found to be more efficient in terms of M. Moreover, in contrast to the fast FIR algorithms, the proposed structure resolves the issues of additional requirements of the pre/post blocks and the absence of parallel structure with coefficient symmetry for higher prime values of M (i.e. M > 3). The synthesis result reveals that the proposed 37-tap filter (with M = 3 and 12-bit inputs) involves 30% less area-delay-product (ADP) per output and 33.05% less power per output compared to the most recent structure.