Publication Type : Conference Paper
Publisher : Elsevier
Source : Proceedings of the 5th International Conference on Trends in Electronics and Informatics, ICOEI 2021
Url : https://www.scopus.com/record/display.uri?eid=2-s2.0-85113573998&origin=resultslist&sort=plf-f
Campus : Amritapuri
School : School of Engineering
Department : Electronics and Communication
Year : 2021
Abstract : A Linear Feedback Shift Register (LFSR) is used to generate Pseudo random sequences of bits which can be used in testing a logical circuit. In this work a Test Pattern Generator is implemented which can work as internal LFSR and external LFSR based on the control signal. This module is implemented for different Primitive polynomials from 3bits to 11 bits in Vivado using Zynq-7000 and parameters like utilization, power, and timing are analyzed. The main objective of this work is to increase the length of the Pseudorandom sequences generated by a Test Pattern generator by combining internal and external LFSR using a control signal in a single module. So that, the long test patterns can be generated by using lower bit LFSR.
Cite this Research Publication : Vikranth, Chinnapapakkagari Sreenivasa, Rakesh, Kanna, Jagadeesh, Bodavula, Mohammad, Doriginti, Somanathan, Geethu Remadevi, Bhakthavatchalu, Ramesh, "Design and Analysis of Test Pattern Generator by combining internal and external LFSR", Proceedings of the 5th International Conference on Trends in Electronics and Informatics, ICOEI 2021.