Back close

Area of Hysteresis Loop of a Generic Memristor Emulator

Publication Type : Journal Article

Publisher : IEEE

Source : 2019 4th International Conference on Smart and Sustainable Technologies (SpliTech)

Url : https://ieeexplore.ieee.org/abstract/document/8783019

Campus : Amaravati

School : School of Business

Year : 2019

Abstract : Extensive research demonstrated that a memristor can be used as a memory storage system. Subsequent studies have been carried out to facilitate the use of memristor as an electronic synapse. However, the price of the memristor is very high due to the high cost of fabricating a memristor. In order to continue research in this field, it is necessary to design memristor models and emulators. One of three significant fingerprints of the memristor is Hysteresis Loop. This loop area is useful to measure the memory effect of a memristor. In this paper, the area of hysteresis loop for a current-controlled generic memristor emulator is derived. An current controlled memristor emulator circuit design is developed using Multisim software with available low-cost electronic components. All three fingerprints of the memristor are realized through simulations and mathematical analysis. The obtained results are verified by modified memristor emulator system.

Cite this Research Publication : Nune Pratyusha, Santanu Mandal, Rohit Bhargav Peesa, Mohammed Suhail., Area of Hysteresis Loop of a Generic Memristor Emulator, 2019 4th International Conference on Smart and Sustainable Technologies (SpliTech), IEEE.

Admissions Apply Now