Publication

Abstract : This paper presents a simple method to design 3D on-chip antenna with improved gain and efficiency. In the proposed method, without introducing any additional metal-based ground layer, a low resistive Si substrate is used as the ground plane for a monopole fed dielectric resonator antenna (DRA). A cylindrical DRA (CDRA) made-up of Barium Titanate ( = 24) is placed on the top side of the oxide coated Si wafer and is excited under mode with a coaxial probe inserted from the bottom of the substrate using TSV (through silicon via) hole. The proposed on-chip CDRA (OC-CDRA) designed within the foot-print area of /6.12 /6.12 provides the peak radiation gain and efficiency of 1.2 dBi and 87% respectively at its resonating frequency of 3.5 GHz. Also, it shows 14% fractional bandwidth (FBW) with respect to its resonating frequency. Further, the isolation between co- and cross ( ) polarization components along the maximum radiation direction of the two principle planes with = 0 and 90 are obtained as 34 dB and 39 dB respectively. Preparing the dielectric material, the proposed OC-CDRA is fabricated and the experimentally measured results show good agreement with the simulated results.