Publication

Abstract : In this work, an analytical model for a twin gate Tunnel Field Effect Transistor's drain current operating in the subthreshold and superthreshold regions is proposed. Using this drain current model, the ratio of transconductance to drain current, a crucial metric for the integrated analog circuit design technique, has been retrieved. Due to the simplicity of this approach, it may be quickly implemented for any type of dual gate TFETs by adjusting a few parameters. Comparing the drain current calculated by this analytical model to the drain current simulated by the 2D-Sentaurus TCAD software demonstrates the Tunnel FET's authenticity. The proposed analytical method can be used to achieve the appropriate transconductance for operating Tunnel FETs in the gigahertz region with very low milliwatt power consumption.