Publication Type : Journal Article
Publisher : Integration
Source : Integration, The VLSI Journal (2022)
Url : https://www.sciencedirect.com/science/article/abs/pii/S0167926022000955
Campus : Chennai
School : School of Engineering
Department : Electronics and Communication
Year : 2022
Abstract : A two stage cascode Low Noise Amplifier (LNA) is designed in 130 nm SiGe HBT. The work focuses on achieving a low Noise Figure (NF), high linearity, and high gain for the LNA in the frequency band of 57.24 GHz-65.88 GHz to be operated in all the four channels of IEEE 802.11ad standard. A modified Derivative SuperPosition technique is used in the first stage of the cascaded LNA to improve the linearity of the circuit. Post layout Electromagnetic (EM) simulation results of the proposed LNA achieves a peak gain of 20.19 dB at 59.5 GHz, linearity (IIP3)) of 2 dBm at the maximum gain and also achieved a NF of 4.1 dB - 4.8 dB in the operating band of frequency. DC power consumption of the proposed circuit is 9.2 mW from a supply voltage of 1.2 V.
Cite this Research Publication : Pournamy S, Maran Ponnambalam, “A two stage cascode LNA using modified derivative superposition technique in 0.13μm HBT with an IIP3 of 2 dBm and NF of 4.8 dB for IEEE 802.11ad standard”, Integration, The VLSI Journal (2022)