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A 4.2ppm/°C temperature compensated CMOS voltage reference

Publication Type : Journal Article

Publisher : Research India Publications

Source : International Journal of Applied Engineering Research, Research India Publications, Volume 10, Number 9, p.23739-23746 (2015)

Url : http://www.scopus.com/inward/record.url?eid=2-s2.0-84935025796&partnerID=40&md5=91b50554fe78c7135cdff1eb6ccdbb19

Campus : Coimbatore

School : School of Engineering

Department : Electronics and Communication

Year : 2015

Abstract : A voltage reference circuit compatible with latest CMOS standards and temperature stability was developed using 90nm CMOS technology. The circuit includes CMOS transistors operating in saturation and triode regions, without the aid of resistors, diodes and bipolar transistors. In a band gap voltage reference circuit, the temperature independent reference voltage is attained by the base emitter voltages of the bipolar transistors used. In the proposed circuit these bipolar transistors and resistors are replaced by ratioed MOS transistors. The CMOS transistors were biased and designed in such a way that the temperature dependencies of mobility and gate oxide were nullified. The circuit was developed for a constant reference voltage of 1.03V with a temperature coefficient of 4.2ppm/°C, over a range of 0-160 °C. The circuit was operated with a supply voltage of 1.8V and draws a maximum value of supply current as 9.05μA and maximum power dissipation was 77.73μW. © Research India Publications.

Cite this Research Publication : P. Paul and Kayalvizhi, N. M. N., “A 4.2ppm/°C temperature compensated CMOS voltage reference”, International Journal of Applied Engineering Research, vol. 10, pp. 23739-23746, 2015.

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