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VLSI Development of Finite Field Arithmetic

Start Date: Wednesday, Nov 29,2006

School: School of Engineering, Coimbatore

Project Incharge:Dr. M. Sethumadhavan
Project Incharge:Dr. T. R. Padmanaban
Funded by:GoI
VLSI Development of Finite Field Arithmetic

In this project we are attempting to address various VLSI design related issues with a special focus on low area and low power implementation of the finite filed arithmetic. We intend to select a few algorithms with the potential for application in the area. Their realization with FGPA will be studied, analyzed and compared. The focus will be on the identification of algorithms and parameter combinations which will deliver optimum performance.

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