Year : 2013
A Reconfigurable Parallel Hardware Implementation of the Self-Tuning Regulator
Cite this Research Publication : T. Ananthan and Vaidyan, M. V., “A Reconfigurable Parallel Hardware Implementation of the Self-Tuning Regulator”, ACM Trans. Reconfigurable Technol. Syst., vol. 6, pp. 14-21, 2013.
Publisher : ACM Trans. Reconfigurable Technol. Syst.
Year : 2013
FPGA-based parallel architecture for PID control algorithm and HDL co-simulation
Cite this Research Publication :
T. .Ananthan and .V.Vaidyan, M., “FPGA-based parallel architecture for PID control algorithm and HDL co-simulation”, Inderscience- International Journal of embedded systems, vol. 5, pp. 239 – 247, 2013.
Publisher : Inderscience- International Journal of embedded systems
Year : 2012
An FPGA-based Controller design for servo actuator using Xilinx System Generator and HDL co-simulator
Cite this Research Publication :
T. .Ananthan, .V.Vaidyan, M., and Varghese, M. V., “An FPGA-based Controller design for servo actuator using Xilinx System Generator and HDL co-simulator”, STM-Journal of VLSI Design Tools and Technology, vol. 2, pp. 1-6, 2012.
Publisher : STM-Journal of VLSI Design Tools and Technology