Senthil Murugan has a Bachelor of Engineering in Electronics and Communication Engineering from Madras University, India and a Master of Engineering from Anna University, India.
He has worked for more than 12 years in the VLSI industry, 10 of which have been in the US. He served as Verification Engineer in Cirrus Logic Inc., USA and Senior Design Engineer in Onspec Electronics, TPL Gropus and Ironkey USA. He has extensive experience in design and verification in ASICs, FPGAs, and Systems for mass storage area.
Currently he is working as a senior Assistant Professor in ECE department of Amrita Vishwa Vidyapeetham, Amritapuri, India. He has taped out several designs (IDE & Flash memory based applications) during his tenure in VLSI Industry. His areas of expertise are FPGA & ASIC based system design, digital designs and embedded systems.
Year : 2017
Cite this Research Publication : Chandni Arun and Senthil Murugan, “Design of image steganography using LSB XOR substitution method”, in 2017 International Conference on Communication and Signal Processing (ICCSP), 2017
Publisher : 2017 International Conference on Communication and Signal Processing (ICCSP)
Year : 2015
Cite this Research Publication : D. Jose and Senthil Murugan, “Verilog implementation of low density parity check codes”, International Journal of Applied Engineering Research, vol. 10, pp. 630-633, 2015.
Publisher : International Journal of Applied Engineering Research
Year : 2015
Cite this Research Publication : T. C. Sruthi and Senthil Murugan, “Efficient implementation of image smoothing in FPGA”, International Journal of Applied Engineering Research, vol. 10, pp. 663-665, 2015.
Publisher : International Journal of Applied Engineering Research
