Year : 2015
Verilog implementation of low density parity check codes
Cite this Research Publication :
D. Jose and Senthil Murugan, “Verilog implementation of low density parity check codes”, International Journal of Applied Engineering Research, vol. 10, pp. 630-633, 2015.
Publisher : International Journal of Applied Engineering Research
Year : 2015
Efficient implementation of image smoothing in FPGA
Cite this Research Publication : T. C. Sruthi and Senthil Murugan, “Efficient implementation of image smoothing in FPGA”, International Journal of Applied Engineering Research, vol. 10, pp. 663-665, 2015.
Publisher : International Journal of Applied Engineering Research