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Ashok P.

Faculty Associate, Department of Electronics and Communication Engineering, School of Engineering, Coimbatore

Qualification: M.E.
p_ashok@cb.amrita.edu
Research Interest: VLSI Architectures, Stochastic Computing, Neural Network
Date of Joining: 11/12/2024

Bio

Ashok P. currently serve as Faculty Associate at the Department of Electronics and Communication Engineering, School of Engineering, Coimbatore.

A Masters in electronics background pursuing doctorate in VLSI domain. A work experience in an information technology domain and teaching experience as assistant during doctoral period as scholar and teaching assistant.

Qualification

  • Ph. D. (Pursuing)
    VLSI, Unconventional Computing
  • 2016 : M. E.,
    Applied Electronics, Anna University/ Sri Krishna College of Engineering and Technology

Undergraduate Courses Handled

  1. Digital Electronics
  2. VLSI Testing and Testability
  3. Analog Electronics
  4. VLSI Design
Publications

Journal Article

Year : 2023

Accuracy Analysis on Design of Stochastic Computing in Arithmetic Components and Combinational Circuit

Cite this Research Publication : Ashok, P, and B Bala Tripura Sundari. 2023. "Accuracy Analysis on Design of Stochastic Computing in Arithmetic Components and Combinational Circuit" Computation 11, no. 12: 237. https://doi.org/10.3390/computation11120237

Publisher : Computation

Year : 2022

Computational Analysis of stochastic arithmetic computing and stochastic activation function

Cite this Research Publication : Ashok, P., and B. Bala Tripura Sundari. "Computational Analysis of stochastic arithmetic computing and stochastic activation function." In Journal of Physics: Conference Series, vol. 2325, no. 1, p. 012032. IOP Publishing, 2022

Publisher : IOP Publishing

Conference Paper

Year : 2023

Implementation of stochastic computing in activation functions using stochastic arithmetic components

Cite this Research Publication : Ashok, P., and B. Bala Tripura Sundari. "Implementation of stochastic computing in activation functions using stochastic arithmetic components." In 2023 IEEE 8th International Conference for Convergence in Technology (I2CT), pp. 1-5. IEEE, 2023.

Publisher : IEEE

Year : 2016

Analysis on implementation of lifting scheme in dwt architecture for efficient memory

Cite this Research Publication : Ashok.P, Thirumaraiselvi.C, "Analysis on implementation of lifting scheme in dwt architecture for efficient memory ", International Journal Of Advanced Research Trends in Engineering and Technology (IJARTET), VOLUME 3,SPECIAL ISSUE 1 - MARCH 2016, pp.36 – 43, ISSN 2394-3777 (Print) ISSN 2394-3785 (Online) (10.20247/IJARTET.2016.S0303007)

Professional Experience
Position Organization Period Domain
Faculty Associate Amrita VishwaVidyapeetham 11/12/24 to present Teaching and Research
Teaching Assistant/ Research Scholar Amrita VishwaVidyapeetham 01/04/2022 to 30/06/2024 Research, Practical Teaching/ Assistance,
Teaching Assistant/ Research Scholar Amrita VishwaVidyapeetham 02/01/2019 to 30/04/2020 Research , Practical Teaching/ Assistance
Programmer Analyst Cognizant Technology Solutions 01/05/2016 to 30/08/2018 Strategic projects
Project Trainee Robert Bosch 01/10/2015 to 30/04/2016 ETP, Network development
Organizing Faculty Development / STTP / Workshops /Conferences
SNo Title Organization Period Outcome
1. Faculty Development in Digital Electronics and Systems Amrita VishwaVidyapeetham, Coimbatore March 2023 Course plan for other branch streams
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