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Speakers

Anish Kumar
Anish Kumar

Sr.Application Engineer with Entuple,
10 year of experience in VLSI and Embedded Domain

Priyanshu Datta
Priyanshu Datta

Field Application Engineer in Entuple Technologies Private Limited.

Ms. Saraswati
Ms. Saraswati

PD Engineer – Cadence

Schedule

Day-1: July 28, 2022

Speaker : Anish K. Sharma, Sr. AE – Noida

Session-1: (10 am – 12 pm)

  • Introduction to IC Design Flow
  • Cadence EDA tools for Semi-Custom IC Design
  • Functional Simulation using Incisive tool.

(12pm-1pm) – Lab 1 – Self-practice by participants.

Session-2: (2 pm – 4 pm)

  • Introduction to TCL Scripting
  • RTL Synthesis using Genus Synthesis Solution
  • Synthesis Optimization for Power/Performance

(5pm-6pm) – Lab 2 – Self-practice by participants.

Demo: The sessions will be demonstrated by “UART/8-bit counter” as an example.

Day-2: July 29, 2022

Speaker : Priyanshu Datta, AE, Bangalore

Session-3: (10 am – 12 pm)

  • Introduction to Functional Verification
  • Functional Verification using Conformal LEC Tool
  • Pre & Post Synthesis Analysis.

(12pm-1pm) – Lab 3 – Self-practice by participants.

Session-4: (2 pm – 4 pm)

  • Introduction to DFT (Design For Test)
  • Synthesis based on DFT using Modus tool
  • ATPG Based DFT

(5pm-6pm) – Lab 4 – Self-practice by participants.

Demo: Sessions will be demonstrated by “Shift Register/Counter” as an example.

Day-3: July 30, 2022

Speaker : Ms. Saraswati, PD Engg – Bangalore

Session-5: (10 am – 12 pm)

  • Introduction to STA
  • Timing Analysis using Innovus
  • STA flow using TEMPUS tool

(12pm-1pm) – Lab 5 – Self-practice by participants.

Session-6: (2 pm – 4 pm)

  • Introduction to Low power
  • Power Analysis using VOLTUS
  • Basic flow using VOLTUS tool

(5pm-6pm) – Lab 6 – Self-practice by participants.

Demo: The sessions will be demonstrated by UART/8-bit Counter as an example.

M. Tech. in VLSI Design

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