The Department consists of eminent faculty with a healthy mixture of Industrial Experience, Academics, and Research. Several faculty members have received their graduate and post-graduate degrees from institutions of international repute such as University of California at Los Angeles (UCLA), University of Texas at Austin, University of California, Irvine, Indian Institute of Technology, Indian Institute of Science etc., and/or have been working on research and development projects in firms across the globe. Several faculty members have been exposed to cutting edge research both in India and abroad. In addition, some of the faculty have several years of industrial experience in reputed companies in the US such as Broadcom Corp, Synopsis Inc., Cirrus Logic etc.
The department upholds its research work by maintaining National and International research networks. The department itself has more than 5 funded projects. Various research and projects carried out in the Department in core areas give the students an opportunity to explore engineering on a large scale. The Research area extends over diverse disciplines such as VLSI (Very Large Scale Integration) Design, Digital and Analog Electronics, Data Communication, Wireless Communication, Signal Processing and Image Processing.
The students and researchers working on various research areas are privileged to receive the mentorship of Dr. Jayachandran Nair, a distinguished professor who has hands-on experience in various fields such as Computational Seismology, Communication, Biomedical Engineering, Wireless Sensor Networks and Signal Processing. The research areas of PhD scholars focus on areas such as Biomedical Signal Processing, Speech Signal Processing and Brain Computer Interface.
Research in Biomedical Signal Processing involves EEG (Electroencephalograph) signal analysis of patients using modern Signal Processing methods. The work currently in progress is Epileptic EEG analysis for Classification, Modelling and Estimation of Brain states in Ictal, Pre-ictal and Inter-ictal periods.
The research work on Speech Signal Processing is focused on Speech Recognition, Feature Extraction & Classification of languages particularly- Malayalam phonemes and recognition of Malayalam speech. Even though the primary focus is on Malayalam, the work is intended to be extended to other languages in future.
The research work on Brain Computer Interface focuses on the study of EEG signals, use of modern Signal Processing techniques and Machine Learning Algorithms for Pre-Processing, Removal of Artifacts, Segmentation, Classification and Characterization. The research will also be dealing with classification of signals generated due to normal, event evoked and pathological conditions. The functional aspects of these classified signals are then studied using various Signal Processing Algorithms and Machine Learning Techniques. The effects of external stimulus on EEG will also be studied under supervised and unsupervised condition.
The research ongoing in this area includes Information and Coding Theory, Nonlinear Dynamics/Chaos Theory and its Applications to Communications, Wavelets, Compressed Sensing, Time Series Analysis and Classification. Dr. Nithin Nagraj, has been carrying out extensive work in this area and holds two patents – one for Graph extraction labelling and visualization and the other for Method and apparatus for segmenting structure in CT angiography.
Currently he is working on “Mathematical modelling of population dynamics of Drosophila Melanogaster”, a research project funded by the Department of Bio-technology, Govt. of India., in collaboration with IISER (Indian Institutes of Science Education and Research) Pune.
Other research areas in Data Communication include Automatic Classification of Periodic, Chaotic and Random Time Series Data using Lossless Compression Algorithms, and Chaotic Computing and Logic Design using Nonlinear Maps.
The Department currently executes wide range of research projects under the guidance of Dr. Bibhu Dutta Sahoo, Associate Professor in the dept. of ECE. The research topic “Development of Algorithms and Circuits for High-Speed Serial Links” aims at developing algorithms and circuits to enable 28 Gbps or 40 Gbps serial links. The circuits will be developed using 65-nm CMOS process. Fabrication will be done at UMC followed by testing to show a prototype as a proof-of-concept.
“Development of a non-linearity calibration technique for a VCO-based ADC” involves development of a non-linear calibration technique to realize both higher-order noise shaping as well as high-resolution. This technique will also be demonstrated by fabricating a chip in 65-nm process.
Yet another research topic, “Development of highly linear DACs using Digital Predistortion Techniques” aims at developing a 14-bit 1Gbps linear DAC. Digital Predistortion will be done to realize high linearity. The chip will be fabricated in 65-nm process.
The department also focuses on research areas in VLSI Logic Design and VLSI Signal Processing particularly high speed algorithm for Signal Processing.