Unit 1

Overview of Computer Architecture and Organization: Contrast between computer architecture and organization, Fundamentals of computer architecture, Organization of von Neumann machine, Boolean Algebra, Logic Gates, K Map, Combinational Circuits (Adders, Multiplexers, ALU), Sequential Circuits -Flipflops, Counters, Registers.

Unit 2

Computer Arithmetic and Machine Instruction: Representation of integers and real numbers algorithm for carrying out common integer and floating-point operations, Memory Locations and Addresses, Memory operations, Instruction format, execution cycle, Instruction types and addressing modes.

Unit 3

Memory System Organization and Architecture: Memory system hierarchy, main memory organization, cache memory, virtual memory. I/O organization: Bus control, Serial I/O (study of Asynchronous and synchronous modes), Parallel Data transfer: (Program controlled: Asynchronous, synchronous & Interrupt driven modes, DMA mode, interrupt controller and DMA controller), Buses Device subsystem, External storage system, RAID architecture.

Unit 4

Design of control unit, microprogrammed Control unit. Organization of CPU: Single vs multiple data path ISA Control unit Instruction, pipelining, Trends in computer architecture: CISC, RISC, VLIW, Pipelining (stages, hazards).

Course Objectives:

• Understand the fundamental concepts and differences between computer architecture and organization, providing a comprehensive overview of von Neumann machine organization and its construction from Boolean logic.
• Master the representation of integers and real numbers, algorithms for common arithmetic operations, memory operations, instruction formats, execution cycles, and addressing modes.
• Gain proficiency in memory system organization, including memory hierarchy, main memory, cache memory, and virtual memory, as well as I/O organization and external storage systems.
• Learn the design principles of control units, and the organization of central processing units (CPU).

Course Outcomes:

After completing this course, students should be able to
CO1: Build basic digital logic circuits for CPU components like adders and flip-flops.
CO2: Interpret machine instructions to understand how programs execute on a computer.
CO3: Evaluate memory hierarchy designs and I/O communication protocols to optimize data access and peripheral interaction.
CO4: Design microprogrammed control units and analyze architectural trends like pipelining to maximize CPU performance and efficiency.

CO-PO Mapping

1. V. C. Hamacher, Z. G. Veranesic, and S. G. Zaky, Computer Organization, Tata McGraw Hill
2. William Stallings, Computer Organization and Architecture -– Designing for Performance, Pearson Education
3. J. P. Hayes, Computer Architecture and Organisation, McGraw Hill
4. D.A. Pattersen and J. L. Hennesy, Computer Architecture- A quantitative Approach, Morgan Kaufman