Publication Type : Conference Paper
Publisher : 2017 2nd International Conference on Communication and Electronics Systems (ICCES),
Source : 2017 2nd International Conference on Communication and Electronics Systems (ICCES), IEEE, Coimbatore, India (2017)
Url : https://ieeexplore.ieee.org/abstract/document/8321286
Campus : Amritapuri
School : School of Engineering
Center : Electronics Communication and Instrumentation Forum (ECIF)
Department : Electronics and Communication
Verified : Yes
Year : 2017
Abstract : Secure transmission of data in a system over the network makes use of various cryptographic techniques. A good and efficient cryptosystem would play a crucial role in providing security services as Data-integrity, Confidentiality, and Authenticity. The security aspect of a cryptosystem is dependent on the computational difficulty involved in solving the mathematical problems involved in the cryptographic technique. Modular exponentiation which makes use of repeated modular multiplication is a tedious process, which is the core operation utilized in cryptosystems. So one can say that the performance of a cryptosystem confides in the performance of modular multiplication and exponentiation. Montgomery multiplication is considered to be a method for performing fast modular multiplication. In this paper comparative study of Montgomery multiplier for various bits is carried out by implementing in Spartan 3E FPGA board and it's different parameters are categorically analyzed.
Cite this Research Publication : C. Anoop and Anu Chalil, “Performance analysis of montgomery multiplier”, in 2017 2nd International Conference on Communication and Electronics Systems (ICCES), Coimbatore, India, 2017