Year : 2018
A new approach for 1-D and 2-D DWT architectures using LUT based lifting and flipping cell
Cite this Research Publication : Hegde, G., Reddy, K.S., Shetty Ramesh, T.K., A new approach for 1-D and 2-D DWT architectures using LUT based lifting and flipping cell, AEU-International Journal of Electronics and Communications, 2018, 97, pp. 165–177
Year : 2016
VLSI implementation of the video encoder using an efficient 3-D DCT algorithm
Cite this Research Publication : G. Hegde, Dr. Shikha Tripathi, and Vaya, P. R., “VLSI implementation of the video encoder using an efficient 3-D DCT algorithm”, International Journal of Electronics Letters, vol. 4, pp. 38–49, 2016.
Publisher : International Journal of Electronics Letters, Taylor & Francis.
Year : 2015
Conservative approximation-based full-search block matching algorithm architecture for QCIF digital video employing systolic array architecture
Cite this Research Publication :
G. Hegde, Krishna, R. S. Amritha, and Vaya, P., “Conservative approximation-based full-search block matching algorithm architecture for QCIF digital video employing systolic array architecture”, ETRI Journal, vol. 37, pp. 772-779, 2015.
Publisher : ETRI Journal
Year : 2013
A parallel 3-D discrete wavelet transform architecture using pipelined lifting scheme approach for video coding
Cite this Research Publication :
G. Hegde and Vaya, P., “A parallel 3-D discrete wavelet transform architecture using pipelined lifting scheme approach for video coding”, International Journal of Electronics, vol. 100, pp. 1429-1440, 2013.
Publisher : International Journal of Electronics
Year : 2012
Systolic array based motion estimation architecture of 3D DWT sub band component for video processing
Cite this Research Publication :
G. Hegde and Vaya, P., “Systolic array based motion estimation architecture of 3D DWT sub band component for video processing”, International Journal of Signal and Imaging Systems Engineering, vol. 5, pp. 158-166, 2012.
Publisher : International Journal of Signal and Imaging Systems Engineering
Year : 2012
An efficient 3-dimensional discrete wavelet transform architecture for video processing application
Cite this Research Publication :
G. Hegde and Vaya, P., “An efficient 3-dimensional discrete wavelet transform architecture for video processing application”, Journal of Electronics, vol. 29, pp. 534-540, 2012.
Publisher : Journal of Electronics