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Design of an Area Optimized Double Precision Floating Point Divider on FPGA

Publication Type : Conference Proceedings

Publisher : RVS College of Engineering and Technology

Source : International Conference on Intelligent Information Systems & Management-(IISM10), RVS College of Engineering and Technology, Coimbatore (2010)

Campus : Coimbatore

School : School of Engineering

Department : Electronics and Communication

Year : 2010

Abstract :

Cite this Research Publication : Ramesh S. R. and .K, S., “Design of an Area Optimized Double Precision Floating Point Divider on FPGA”, International Conference on Intelligent Information Systems & Management-(IISM10). RVS College of Engineering and Technology, Coimbatore, 2010.

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