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Design of Multistage Counters Using Linear Feedback Shift Register

Publication Type : Journal Article

Source : Lecture Notes in Networks and Systems, Vol. 311, pp. 161-173,2022

Url : https://link.springer.com/chapter/10.1007/978-981-16-5529-6_13

Campus : Coimbatore

School : School of Engineering

Department : Electronics and Communication

Year : 2022

Abstract : Applications such as single-photon detection require the use of large array of counters within a small area. Linear feedback shift registers (LFSR) can be considered as the best option for such applications, where the area can be considerably reduced. Compared to a conventional binary counter, these counters enhance area and performance. In existing literature, only many-to-one LFSR structure was used. However, if LFSR counter is used for first stage and binary counters for subsequent stages could increase performance of the counter designs. In this paper, the LFSR counters are combined with binary counters and the performance in terms of area, speed and power are compared with existing multistage counters. Also instead of using a decoding logic for each stage as in existing literature, a single decoder with a multiplexer is used. This gives a reduced area. A two stage LFSR counter is implemented in Xilinx Vivado 2017.2, and the results are validated. Due to its efficacy, they can be used in deep learning and big data analysis.

Cite this Research Publication : Neethu B Nair, J P Anita , “Design of Multistage Counters Using Linear Feedback Shift Register”, in Lecture Notes in Networks and Systems, Vol. 311, pp. 161-173,2022.

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