Publication

Abstract : In the recent years, the general trend in the embedded industries is to integrate the different hardware modules in a single Integrated Chip (IC) to form System on Chip (SoC). SoCs are hugely preferred in the high performance computing industries. Network on Chip (NoCs) was introduced to enhance the scalability of SoCs. NoC concepts brought prominent progress over conventional communication architectures used in SoCs. In this work, an effective coding design is proposed for communicating the information in SoC through serial communicating NoC links. This coding technique generates the bit patterns with less switching activity to develop a low power dissipating NoC links. The proposed Nibble based Two Bit Invert (NTBI) coding technique approach minimizes the overall switching activities by using bit invert approach for the serial communicating NoC links. The NTBI coding technique is designed using Modelsim and Cadence genus 45 nm technology is used for implementation. The results of this experiment show that the proposed method occupies 57.99 % less area and 65.02 % less delay when compared to the available coding technique.