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Fast Error Correction for Header Flit in NoC

Publication Type : Conference Paper

Publisher : 2019 International Conference on Communication and Electronics Systems (ICCES)

Source : 2019 International Conference on Communication and Electronics Systems (ICCES), IEEE, Coimbatore, India (2019)

Url : https://ieeexplore.ieee.org/document/9002181

Campus : Bengaluru

School : School of Engineering

Department : Electronics and Communication

Year : 2019

Abstract : To improve data reliability in NoC, extensively adopted method is the deployment of error correction codes. Errors present in the data flit are corrected by these codes and this is not applicable for correcting errors present in the header flit. So, there is a need for an coding method which will correct errors in data and also the header flit. Further, it is important to have a coding method that will decode the header flit faster compared to data flit, as header flit is used for processing the data flits. Existing single error correction and double error detection code is improved and presented in this paper to support faster error correction in header flit with retaining the same number of redundant bits. This improved code is synthesised and results are compared with existing code. The results show that the header flit are decoded faster compared to data flits as the critical path delay is reduced.

Cite this Research Publication : T. Sai Srinat V. Reddy, G. Reddy, H. Sekhar, K. Reddy, J., and M. Vinodhini, “Fast Error Correction for Header Flit in NoC”, in 2019 International Conference on Communication and Electronics Systems (ICCES), Coimbatore, India, 2019.

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