Publication Type : Journal Article
Publisher : IET Circuits, Devices & Systems
Source : IET Circuits, Devices & Systems, Volume 14, Number 1, p.60-65 (2020)
Url : https://ietresearch.onlinelibrary.wiley.com/doi/abs/10.1049/iet-cds.2019.0189
Keywords : blind zone, Charge pump circuits, differential design, frequency 2.4 GHz, Integer-N charge pump, near-zero dead zone, phase detectors, Phase frequency detector, phase locked loop, Phase locked loops, PLL, power 9.72 mW, size 180.0 nm, three-stage ring oscillator, time 1.7 mus, TSMC technology, UHF integrated circuits, voltage 1.8 V, voltage-controlled oscillator, voltage-controlled oscillators
Campus : Bengaluru
School : School of Engineering
Department : Electronics and Communication
Year : 2020
Abstract : In this article, a novel design is presented, for an Integer-N charge pump phase locked loop (PLL). The design is with a resetless phase frequency detector, and with the differential design of charge pump. The voltage-controlled oscillator is of current starved type. The proposed PLL is not having any blind zone and is having near-zero dead zone. When compared to the conventional design, the current mismatch in the charge pump is reduced by 3.21%, and the lock time of the PLL is reduced by 79%. The PLL is intended for 2.4 GHz application, and the obtained lock time is 1.7 μs. The implementation is done with the three-stage ring oscillator, with divider of modulus as 24, in 180 nm TSMC technology. At 1.8 V supply voltage, the circuit consumes 9.72 mW of power.
Cite this Research Publication : A. Koithyar and Dr. T. K. Ramesh, “Integer-N charge pump phase locked loop for 2.4 GHz application with a novel design of phase frequency detector”, IET Circuits, Devices & Systems, vol. 14, pp. 60-65, 2020.