Module I
8085 Microprocessor: Architecture – Functional block diagram – Registers, ALU, Bus Systems – Timing and Control Signals – Machine cycles and timing diagrams, memory & IO interfacing.
Course Name | Microprocessor and Microcontroller |
Course Code | 19EAC214 |
Program | B. Tech. in Electronics and Computer Engineering |
Semester | 4 |
Year Taught | 2019 |
8085 Microprocessor: Architecture – Functional block diagram – Registers, ALU, Bus Systems – Timing and Control Signals – Machine cycles and timing diagrams, memory & IO interfacing.
ARM Architecture: RISC Machine – Architectural Inheritance – Programmers Model. ARM Assembly Language Programming: Data Processing Instructions – Data Transfer Instructions – Control Flow Instructions. ARM Organization and Implementation: 3-stage Pipeline – 5-stage Pipeline – ARM Instruction Execution – ARM Implemenation – Coprocessor Interface. ARM Instruction Set – Architectural Support for High-Level Programming – Thumb Instruction Set.
Architectural Support for System Development: ARM memory Interface – AMBA Interface – The ARMulator – JTAG Boundary Scan Architecture – Embedded Trace. ARM Processor Cores: ARM7TDMI – ARM8 – ARM9TDMI – ARM10TDMI. Memory Hierarchy – Memory Size and Speed – ON-Chip Memory – Caches. Architecture Support for Operating System: ARM System Control Coprocessor – CP15 Protection Unit Registers – ARM MMU Architecture. ARM CPU Cores: ARM710T – ARM720T – ARM740T – ARM810 – Strong ARM SA-110.
Course Objectives
Course Outcomes
CO – PO Mapping
PO/PSO/ CO |
PO1 | PO2 | PO3 | PO4 | PO5 | PO6 | PO7 | PO8 | PO9 | PO10 | PO11 | PO12 | PSO1 | PSO2 |
CO1 | 3 | |||||||||||||
CO2 | 3 | 2 | 2 | |||||||||||
CO3 | 3 | 3 | 3 | 3 | 3 | 3 | ||||||||
CO4 | 3 | 3 | 3 | 3 | 2 | 3 | 3 | 3 | 3 |
Textbook
References
Evaluation Pattern 50:50 (Internal: External)
Assessment | Internal | External |
Periodical 1 (P1) | 15 | – |
Periodical 2 (P2) | 15 | – |
*Continuous Assessment (CA) | 20 | – |
End Semester | – | 50 |
*CA – Can be Quizzes, Assignment, Projects, and Reports. |
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