Publications

Abstract : Caches in Chip Multiprocessors (CMPs) arenbsp;organized as private L1 caches or large shared L2 cachenbsp;or both. Most of the recent researchers have focused onnbsp;architectural and circuit techniques to increasenbsp;performance.nbsp;Variable Forwarding Cache Coherency combinesnbsp;the advantages of private caches and shared caches, i.e.,nbsp;low latency of L1 and miss rate of shared L2. This papernbsp;proposes a methodology to improve performance of thenbsp;system by using variable forwarding cache coherencenbsp;technique in CMPs.