Publication Type : Conference Paper
Publisher : 2010 3rd International Conference on Emerging Trends in Engineering and Technology
Source : 2010 3rd International Conference on Emerging Trends in Engineering and Technology, Goa, India, p.791-796 (2010)
Url : https://ieeexplore.ieee.org/document/5698435
Keywords : Clocks, Core, CPU, Datapath, Dual Core, dual core microcontroller, embedded system application, Embedded systems, hardware description languages, Logic design, Logic gates, Low Power, low power techniques, low-power electronics, Microcontroller, Microcontrollers, performance, Pipelines, Power demand, Program compilers, registers, single core CPU, single core microcontrollers, Synopsys design compiler, Verilog HDL, Xilinx
Campus : Amritapuri
School : School of Engineering
Department : Electronics and Communication
Year : 2010
Abstract : Microcontrollers that can provide higher performance while maintaining low power consumption is a key research area. Power aware high performance microcontrollers are critical in embedded system applications. Our paper mainly focuses on the low power implementation of a Dual Core Microcontroller. A Dual Core Microcontroller consumes less power and area than two coupled Single Core Microcontrollers. We have implemented a Low Power Single Core CPU for a Dual Core Microcontroller in Verilog HDL and synthesized the design using Synopsys Design Compiler and Xilinx 10.1. We have also given the experimental results for the low power techniques implemented.
Cite this Research Publication : Rajesh Kannan Megalingam, Mohan, A., Thavalengal, S. H., Rao, T. M., and Periye, V., “Low Power Single Core CPU for a Dual Core Microcontroller”, in 2010 3rd International Conference on Emerging Trends in Engineering and Technology, Goa, India, 2010, pp. 791-796