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Data Flipping Coding Technique to Reduce NOC Link Power

Publication Type : Conference Paper

Publisher : 2017 IEEE International Conference on Computational Intelligence and Computing Research, ICCIC 2017

Source : 2017 IEEE International Conference on Computational Intelligence and Computing Research, ICCIC 2017, IEEE, Coimbatore, India (2017)

Url : https://ieeexplore.ieee.org/document/8524209

Campus : Bengaluru

School : School of Engineering

Center : Electronics Communication and Instrumentation Forum (ECIF)

Department : Electronics and Communication

Year : 2017

Abstract : Power consumed by Network on Chip (NoC) plays significant role in the power budget of the System on Chip (SoC). In NoC, links consumes almost quarter of the power. Transition count in the link have to be reduced to reduce the switching activity and hence its dynamic power. Many techniques have been introduced to reduce the transition count. This paper presents a unique data coding technique through which the transition count can be reduced in parallel data transmission. This technique reduces an average of 61.42 percentage of link power with less area compared to quadro and multi coding techniques. The proposed technique, which is applicable for any data width, achieves 17% power saving of the total network used for demonstration.

Cite this Research Publication : M. Moulika, M. Vinodhini, and Dr. N.S. Murty, “Data Flipping Coding Technique to Reduce NOC Link Power”, in 2017 IEEE International Conference on Computational Intelligence and Computing Research, ICCIC 2017, Coimbatore, India, 2017.

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