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Dr. Nirmala Devi M.

Dr. Nirmala Devi M. currently serves as Professor and Vice Chairperson at department of Electronics and Communication Engineering, School of Engineering.

Qualification: Ph.D
Research Interest: Soft Computing, Very-Large-Scale Integration (VLSI) Design of Artifiial Neural Networks


Dr. M. Nirmala Devi obtained her B.E. degree in Electronics and Communication Engineering (ECE) in 1990 and M. E. (Applied Electronics) Degree in 1996 from Government College of Technology, Coimbatore, Bharathiar University. She is currently working as the Professor in Amrita School of Engineering, Amrita Vishwa Vidyapeetham, Coimbatore. During her tenure at Amrita, she received her Ph. D. degree in the area of VLSI Design of Artificial Neural Networks from Anna University, Chennai in 2010. She has been the coordinator for M. Tech. VLSI Design program.

She has delivered invited lectures on VLSI Design in AICTE and UGC sponsored faculty development programs and conferences. She has also organized a few in-house workshops on “Analog and Digital VLSI Designs and tools”. Moreover she has organized the “National Symposium on Green Electronics” during December 2014. She has served as Board of Studies member for some institutions. She is the recipient of “Appreciation Award” from Amrita Institute of Technology during the year 2003. Moreover, Marquis Who’s Who in the World 2011 distinguishes her as one of the leading achievers from around the country. Furthermore, International Biographical Centre, Cambridge, England has chosen her for inclusion in the prestigious publication “2000 Outstanding Intellectuals of the 21st Century – 2011”. Her areas of interest include VLSI Design and Testing, Computational Intelligence, Hardware Security and Trust, Evolvable Hardware and RF CMOS System Design. She has published around 55 papers in the International Journals and Conferences in her field of expertise. She has served as the reviewer for international conferences and international journals which include the following;

  1. Springer Journal of the Institution of Engineers (India): Series B
  2. Inderscience Int. Journal of Information and Communication Technology


  • Appreciation Award – Amrita Institute of Technology & Science- 2003
  • Marquis Who’s Who in the World- 2011
  • 2000 Outstanding Intellectuals of the 21st Century- 2011 – International Biographical Center, Cambridge, England.

Major Research Objectives

  • VLSI Design & Testing– Development of efficient algorithms for VLSI testing and extending it to focus on low power concept with compression schemes
  • RF CMOS System design– Application of CMOS or GaN technology in the design of RF transceiver systems at L, S, and C bands
  • Hardware Security & Trust– Enhancing the security of VLSI chips in safety critical applications like missiles & biomedical implants
  • Computational Intelligence– Application the high potential intelligence concepts like Neural networks, Particle Swarm Optimization, Genetic Algorithms etc., on social and health related problems like perception engineering & cancer Diagnosis for the improvement
  • Evolvable Hardware– Emulation of efficient and optimized algorithms on FPGAs to develop proof-of-concept.

PhD Program and Area of Focus

  1. Secured testing of VLSI Circuits
  2. VLSI Testing and Security
  3. Design for Security
  4. Antenna Design & Optimization
  5. Hardware Design for Trust
  6. Security in Multi-core Architectures
  7. RF CMOS Design of Low-noise Amplifier

Funded Projects

Title of the Research proposal– Hardware Trojan Detection and Consistency based Diagnosis

Investigators– Dr. Nirmala Devi M., Dr. Jayakumar M., Mohankumar N., Dr. Sethumadhavan M.

Funding Agency– DRDO, New Delhi

Period– Two Years

UG/PG Publications

  1. FPGA Implementation of Genetically Evolved Artificial Neural Networks For Effective Resource Utilization
  2. A Power Aware Reordering Based Compression Scheme for Test Volume Reduction
  3. Power Reduction and Defect Coverage Improvement in At-Speed Testing
  4. VLSI Realization of fault tolerant Artificial Neural Networks
  5. FPGA Implementation of Feedforward Neural Network with Layer Multiplexing
  6. Improved Particle Swarm Optimization
  7. Security Enhanced Testing Using Scrambling and Test Compression
  8. Modified PSO with Adaptive Local Search
  9. Test Compression for Low-power Testing
  10. Small-signal Modelling of GaN HEMT based Transistor using PSO
  11. Multi-objective PSO
  12. Design of RF CMOS LNA for Millimeter wave Technology


Reviewer and Program Committee Member

  1. Reviewer – Springer Journal of the Institution of Engineers (India): Series B
  2. Reviewer – Inderscience International Journal of Information and Communication Technology
  3. Reviewer for the International Conference- VLSI- SATA- 2015, 2016.
  4. Reviewer & PC member- International Symposium- VDAT- 2015
  5. Reviewer for the International Journal- Advances in Electrical and Electronic Engineering, VSB- Technical University of Ostrava, Czech Republic, 2014.
  6. Program committee member & Reviewer of “International Conference on Education (EDU 2014)” to be held in Bangalore, INDIA, 2014.
  7. Reviewer for the Journal of The Institution of Engineers (India): Series B, India in 2014.
  8. Reviewer for the International Conference on Embedded Systems ICES 2014, July 3- 5, 2014, Dept. of EEE, Amrita School of Engineering, Amrita Vishwa Vidyapeetham, Coimbatore, 2014.
  9. Program committee member & Reviewer of “The Third International conference on Parallel, Distributed Computing and Applications (IPDCA – 2014)” to be held in Chennai,India.
  10. Member of the editorial board- Chrome Publishing Group, Noida, NCR Delhi, 2014.
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